The present invention relates to field programmable gate arrays (FPGA), and more particularly, to a FPGA based upon the breakdown of the gate oxide of a transistor.
FPGA""s are finding increasing application as logic and/or processing elements. One type of FPGA utilizes SRAM cells, which requires six transistors. This results in a large cell size and therefore low density. Moreover, SRAM based FPGA is volatile.
Another type of FPGA is based upon anti-fuse technology. Although widely accepted, anti-fuse technology requires specialized fuse manufacturing process. Further, a FPGA based upon anti-fuse technology can only be programmed once.
Yet another type of FPGA is based upon flash memory technology. However, flash memory technology requires a relatively more complex semiconductor manufacturing process, thereby increasing cost.